About Department

VISION

Imparting Quality Education to achieve Academic Excellence in Electronics and Communication Engineering for Global Competent Engineers.

MISSION

• Create state of art infrastructure for quality education.
• Nurture innovative concepts and problem solving skills.
• Delivering Professional Engineers to meet the societal needs.

PROGRAM EDUCATIONAL OBJECTIVES

1. Prepare graduates to be professionals, Practicing engineers and entrepreneurs in the field of Electronics and communication engineering.
2. To acquire sufficient knowledge base for innovative techniques in design and development of tools and systems.
3. Capable of competing globally in multidisciplinary field.
4. Achieve personal and professional success with awareness and commitment to ethical and social responsibilities as an individual as well as a team.
5. Graduates will maintain and improve technical competence through continuous learning process.

Program specific outcomes

PSO1: The graduates will be able to apply the principles of Electronics and Communication in core areas.

PSO2: An ability to use latest hardware and software tools in Electronics and Communication engineering.

PSO3: Preparing Graduates to satisfy industrial needs and pursue higher studies with social-awareness and universal moral values.

Lab Infrastructure

The department laboratories has well equipped with high-end software to help students familiarize themselves with new technology.

Layout of Department of Electronics and Communication Engineering

VTU Rank holder of the year 2019.

VTU Undergraduate Rank Holders List

VTU Post Graduate Rank Holders Lists

Digital Electronics & Communication

VTU Post Graduate Rank Holders Lists

VLSI Design and Embedded Systems

• Mr Ashok.D.R (2012-2016 batch) admitted to IISC, Bangalore for PG Program.


• Mr. Srinivas Gowda.R of 2008-2012 of batch has secured 105th rank of UPSC examination (IAS)-2015.

CO CURRICULAR ACTIVITIES 2017-2018

CO CURRICULAR ACTIVITIES 2016-2017

CO CURRICULAR ACTIVITIES 2015-2016

CO CURRICULAR ACTIVITIES 2014-2015

CO CURRICULAR ACTIVITIES 2013-2014

CO CURRICULAR ACTIVITIES 2012-2013

Student pursuing higher studies in other universities (Including Foreign University)

2018-2019

2017-2018

2016-2017

2015 – 2016

Placement in Core and IT Companies:

The Recruitment process of 2020-21 batch is under progress

Technical Activities

Professional Bodies Forum BIT in association of Electronics and Communication Engineering conducted 3 days Virtual FDP from 15.04.2021 to 17.04.2021

Bangalore institute of Technology, Bengaluru has organized the three Days Faculty Development Program webinar on “Emerging Materials, Devices and Systems for the Era of 5G and IOT” enrich the knowledge in the domain such Department of Electronics and Communication Engineering, Bangalore Institute of as VLSI, IOT, Artificial Intelligence, Antennas and Embedded Systems.

Faculty Development Program is conducted in the department Electronics and Communication Engineering

Department of Electronics and Communication Engineering, Bangalore Institute of Technology, Bengaluru has organized the three Days Faculty Development Program webinar on Recent Trends in Wireless Communication Technologies from 03.08.2020 to 05.08.2020

About the Society:

IEEE Bangalore Section was established in 1977 and is one of the most vibrant and dynamic IEEE Section across globe. Over the years the strength of the section has grown steadily and currently the Section membership stands more than 8600. This membership is spread across various sectors and is a nice blend of Industry, Academia and Research organizations. Section Conducted 800+ Technical Activities in the year 2017, 900+ Technical Activities in the year 2018, 1000+ Technical Activities in the year 2019, with the help of Student branches and society chapters. IEEE Bangalore Section won the prestigious MGA Outstanding Large Section Award (2013 & 2019) and R10 Distinguished Large Section Award.

The objective of IEEE technical societies is to provide a scientific and educational platform, directed towards the advancement of the theory and practice of electrical, electronics, and allied branches of engineering. IEEE society memberships enables an individual to stay current/updated within a chosen technology and ensures one is in touch with peers.

IEEE Circuits and Systems (CAS) Society is a leading technical society that promotes the advancement of the theory, analysis, design, tools, and implementation of circuits and systems. The theoretical foundations, architectures and applications, as well as circuits and systems implementation of algorithms

IEEE BIT ECE Circuits and Systems Student Branch was inaugurated on 10th August 2020 @ 7.00 PM using Cisco Webex virtual mode. The inaugural ceremony commenced with the invocation song by Prof. Veena H S. The session started with Inaugural address video sent by Yoshifumi Nishio Vice President Regional Activities and Membership IEEE CAS Society. The inauguration function, inaugurated by Dr. Devesh Diwvedi Chair, CAS Bangalore section, Prof. Raghavendra Prasad, Student Activities chair, Bangalore section, Dr K V Prasad Prof. & HOD, Dept. of ECE, BIT, Dr Sreerangaraju, Prof. & IEEE BIT CAS Advisor and Dr Jalaja.S IEEE BIT Branch Counselor.

After the inaugural address, session started with “Javed’s Attofarad Capacitance Measurement Interface” by G S Javed, Analog Design Manager, Founder, King Consultants Education, Bangalore.
Day 2 on 11th August 2020 session started with “AI in VLSI” by Asif Mohammed, CEO, Zywee: Health Care, Bangalore.
Day 3 on 12th August 2020 session started with “Significance of CTS planning in complex design” by Veena Venugopal, Physical Design Engineer, Marvell Technology, Bangalore.
Day 4 on 13th August 2020 session started with “Post COVID: Opportunities & Challenges in Semiconductor Industry for Upcoming Engineers” by Preet Yadav Analog Practice Head, Distinguished Member of Technical Staff –Senior Member Industrial & Engineering Services (I&ES) Wipro Limited.

Student Membership Benefits:

Special Scholarship Opportunities

Student Travel Awards through IEEE CAS Conferences

Special student discounts on CAS Conferences and Workshops including the CAS Workshops on Emerging Technologies

Career Services and assistance

Young Professionals functions and initiatives

As an IEEE Member students and faculty members are also entitled for various IEEE awards, subsidized registration fee to attend any IEEE Conference, apply for Student Humanitarian Technology Projects, IEEE CAS offers free educational resources to members free-of-charge on CAS Resource Center, Free electronic access to proceedings of CAS conferences and multiple other benefits.

Professional Bodies Forum activities in association with IEEE BIT Student Branch on 7th to 9th August 2020

The Professional Bodies Forum, Bangalore Institute of Technology, Bangalore jointly organized by ECE/CSE/ME/EEE/ETE in association with IEEE BIT Student Branch, CSI BIT Student Branch and IEEE Bangalore Section is organizing a 3-Day Webinar Series on “Academics Vs Industry Collaboration best Practices” on 7th to 9th August 2020. The purpose of this FDP was to expose the faculty members/ research scholars/ Students to aware about various common aspects of all engineering branches, which forms the need of the day. This 3-Day webinar series on “Academics Vs Industry Collaboration best Practices” objectives involving academic institutions and industry partners the most important reasons for entering collaboration are:

• Research Impact
  • Your current research
  • Your future research

• Research funding
• Get Industry to support your research when it relevant.

• Student Placement
• Summer Internship and Full time Employment

The event started at 10.00 a.m using Cisco Webex virtual mode. There were a total 110 participants from various departments. The inauguration function, inaugurated by Dr. M U Aswath, Principal, BIT, Dr C.R Byra Reddy PBF, Chair, Bangalore and Dr Jalaja S PBF, Convener all with all the office bearers of PBF coordinator, Bengaluru.

After the inauguration function, session started with Inaugural address by Dr. M Surendra Prasad Babu Regional Vice President CSI, Region V, India

After the inaugural address, session started with “Role of Industry-Institute Interaction to Promote Education and Entrepreneurship” by Uma Reddy Managing Director, M/s Hitech Magnetics & Electronics Pvt ltd, Bangalore.
Afternoon the post lunch session started with “Corporate expectations campus –HR Perspective” by Sundaram N K Soft skills Trainer & Specialist Consultant in Human Resources. Bangalore.
Day 2 session started with “New World of Test Driven Development” by Ramakrishna C K Project Manager IBM India Private Limited, India.
Afternoon the post lunch session started with “Higher Education in times of uncertainty” by Dr. B N Shubha Professor & HOD Department of Management Studies and Research Centre, B.M.S College of Engineering, Bangalore.
Day 2 session started with “Why? It’s time Academia and Industry engaged in new ways” by Dr. Vaibhav Meshram Professor and HOD in ECE Dept. Dayananda Sagar University Bangalore, Karnataka, India.
Next session started at 11.30 with “Industry – Academia Collaboration: A Win - Win for all” by Preet Yadav, Analog Practice Head, Distinguished Member of Technical Staff –Senior Member, Industrial & Engineering Services (I&ES), Wipro Limited.

Professional Bodies Forum activities in association with International Micro Electronics and Packaging Society (IMAPS) on 3rd to 5th August 2020

3-Day FDP on“Recent Trends in Wireless Communication Technologies”
Organized by
Department of Electronics & Communication Engineering in association with International Micro Electronics and Packaging Society (IMAPS)

The 3-Day online FDP on “Recent Trends in Wireless Communication Technologies” conducted on 3rd, 4th and 5th August 2020 in association with International Micro Electronics and Packaging Society (IMAPS) and Department of Electronics & Communication Engineering, Bangalore Institute of Technology, Bengaluru.
The objectives of this FDP is to enrich the knowledge in the domain such as Wireless Communication Technologies, 5G Technology, IoT, Wearable Antennas, Cyber Security Networks and Antennas with specific emphasis on Spacecraft Antennas.
The FDP was scheduled for 3 days from 3rd to 5th August.
On day 1 the actives are
The inauguration function, inaugurated by Principal Dr. M U Aswath, Dr. K V Prasad, HOD Department of Electronics and Communication engineering, Dr M N Sreerangaraju, Professor, and H S Veena Associate Professor along with all the office bearers of IMAPS chapter, Bengaluru
After the inauguration function, session started with “Research issues in Wireless Sensor Networks” by Dr Suresh Halhalli, Department of Electronics Engineering, M S Bidve college of Engineering, Latur.
Afternoon the post lunch session “Cyber security issues present and future” was handled by DrRavishankar C V, Professor & HOD, Department of ECE, Sambhram Institute of Technology, Bengaluru.
Day 2 session started with “5G and beyond” by Dr M H Kori, Technology Consultant, Retd Technical Director, Alcatel Lucent technologies, Immediate Past Chairman IMAPS India.
Afternoon the post lunch session “Wearable Antennas” was handled by DrSwetha Amit, Assistant Professor, Ramaiah Institute of Technology, Bengaluru.
Day 3 session started with “Spacecraft Antennas” handled by Prof. V Mahadevan, Retd. Professor, PES University, Ex-group director, Communication System group, U R Rao Satellite Centre, Bengaluru.
Afternoon, the post lunch session “Introduction to IOT & it’s applications” was handled by Dr Ganga Prasad, Retd Senior Director, Centre Head, CDAC, Bengaluru. The target audiences were the students, faculties, Industry persons, research scholars and the executive members of IMAPS. Total registered participants are more than 1800.
We are happy to announce that we have participants from 5 countries-Sweden, Oman, Indonesia, Tanzania and West Africa and also from 23 states. Apart form Karnataka, we have more participants from Tamil Nadu, Telangana and Maharashtra.
Concurrent participants in every session are more than 400.
Unique participants in every session are more than 850.

Professional Bodies Forum activities in association with Institution of Engineers(IEI) on 25th & 26th October 2019.

Title of Activity:	ARM Processor
Activity under Divisional Board:	IEI, Bangalore Section
Date:	25.10.19 & 26.10.19
Venue:	Bangalore Institute of Technology, KR Road, VV Pura, Bangalore

The Department of Electronics and Communication Engineering, Bangalore Institute of Technology, Bengaluru has organized the inaugural function on 25th October 2019 at Dr. S. Rame Gowda Seminar Hall, BIT Main Block.

The Inauguration function of the Seminar was held at 9.30 AM on 25th October 2019. Dr.Aswath.M.U., Principal, BIT has presided over the function. Guests of honour in the Inauguration Session were Er. M. Nagaraj, Hon. Secretary, IEI, Karnataka State Centre.

The session started with 'Invocation song” – by Prof. Veena.H.S, Associate Professor, Department of Electronics and Communication Engineering. Lighting of Lamp by Distinguished Guests.

Inaugural Address by Er. M. Nagaraj, Hon. Secretary, FIE, Bengaluru.

Chief Guest of Honor Er. M. Nagaraj, Hon. Secretary, FIE, addressed the audience about the existence, milestones and activities of Institution of Engineers. Also, ARM processor he highlights the significance of additive manufacturing in industries.

Technical Sessions

The Department of Electronics and Communication Engineering, Bangalore Institute of Technology, Bengaluru organied a Two day Open Smeinar on “All India Seminar on ARM Processor” 25th 26th October 2019. The Seminar presents an open forum for industrialists, researchers and engineers to know the latest innovations and research advancements in the areas of ARM Processor and its advanced applications. The seminar was included invited talks from eminent resource persons on the state of the art in related areas. The event started at 9.30 am in Main Seminar Hall. Institute of Engineering (IEI), Karnataka State Centre, sponsored this Seminar and many faculty member, Research Scholar, students are participated in this open seminar. The Open seminar was coordinated by Dr. , Prof Jalaja S and Convener Dr. Reddappa H. N.

Technical Talk Session I

Introduction to ARM Processor Architecture and its Programming
This session was handled by Harish V. Mekali . This presentation included topics such as introduction ARM Design Philosophy, ARM Processor family, Architecture version and its applications. Through his session Prof Harish gave a brief description about the ARM-32 bit Microcontroller and ARM Cortex M3 instruction Sets and Programming.

Day 1 (Afternoon): programming concepts and interfacing devices of CORTEX M3 family. This session was handled by Harish Nadig Vasundhara Technologies CEO Bangalore. The presentation included topics such as Embedded systems Programming on ARM Cortex M3 Processor. With hands on coding C Programming and assembly on ARM Cortex M processor based Microcontroller.
Day 2 (Forenoon): LPC168 CortexM3 Microcontroller kit and programming using Flash Magic. This session was handled by Jagadish Vasundhara Technologies Bangalore. The presentation included topics such as overview of LPC168 Cortex M3Microcontroller. Which was followed by hands on session in which the participants learn about Mixed C’ and Assembly coding.

Day 2 (Afternoon): Lab Session This session was handled by Prof. Gopinath CY, from department of ECE BIT, explained for Logic analyser, watch window and use of breakpoints for simulations of 1/0 ports, on chip devices etc. Which was followed by hands on debugging using USB logic analysers.

Valedictory Address By:

Er. Jasmail Singh FIE, Bengaluru.

On second day participation certificates were distributed to participants, Er. Jasmail Singh FIE, IEI, Karnataka State, Bengaluru.and Dr Aswath Principal, BIT, Bangalore. Participants were asked to come on dice and share their experience. The program was concluded with vote of thanks and group photo.

IETE – Institute of Electronics & Telecommunication Engineers

Department of Electronics and Communication engineering at Bangalore Institute of Technology, inaugurated IETE Students Forum (ISF) with 103 founder student members on 18th March 2019.

The inaugural function started in a traditional way with lamp lighting and saraswathi Pooja. The Chief Guest of the function was Prof. H S Bhatia, Chairman, IETE, Bangalore Centre and Guest of Honor was Prof. C. Murali, IETE, Bangalore Centre. Principal BIT welcomed the gathering and spoke about the important of Professional Bodies Forum. Dr K.V Prasad Professor and HOD Department of Electronics and Communication engineering, BIT, gave an introductory address about various professional societies and their importance.
Prof. H S Bhatia appreciated the efforts of department and Bangalore Institute of Technology in starting this forum and emphasized on benefits of students participation in such events to develop their technical knowledge. He informed the students about the various upcoming events of the IETE Bangalore Centre like conference, workshops, and seminar encouraged the students to participate and increase their membership. He elaborated on the awards given by the forum and their significance.
Prof. C. Murali also briefed the students on the various financial supports that the forum offers. He also delivered a special talk on topic “Intelligent Connectivity the fusion of 5G, AI and IoT” for the benefit of the students.

About Society

The Institution of Electronics and Telecommunication Engineers (IETE) founded in 1953 is one of the leading Professional Society in India. IETE has two streams of Student base.

• First wing is the students of alma-mater, IETE , viz, the pass outs of DIPIETE , AMIETE and ALCCS students .
• Second, one is the Engineering students studying in Engineering Colleges and Polytechnics across the Country. This wing is the ISF ( IETE Students Forum ). More than 550 live ISFs are functioning in India today with a student membership of more than 60,000.

Objectives of ISF

• Improving standard of Engineering Education
• Counseling the students in the emerging new opportunities
• Encouraging and motivating the outside Class room studies /Work shops/projects/Seminars
• Increasing the student base and Corporate membership of IETE

The Institution helps

• To plan, organize Technical Programs, Special Lectures, Workshops, Seminars Symposia, exhibitions for the benefit of students.
• To provide common platform for students to exchange of ideas in technical topics of interest, e.g., curriculum, employment, higher educational opportunities, emerging trends, etc.
• To facilitate technical visits, project works, employment, contact with industries and academic institutions.
• Encourage team spirit and self reliance among student members.
• ISFs should be a catalyst for the overall growth in technical and professional skills in young students.

Commitee Members :

IETE-BIT Coordinator : Dr. Jalaja S

Sl. no	Name of student	Department	Post	Contact No
1	Sai Tarun	ECE	Chair Person	8861259678
2	Rajat Sharma	ECE	Treasurer	8259925358
3	Akshatha Mohan	ECE	Core-Committee Member	-
4	Nandini	ECE	Core-Committee Member	9741276853

IETE Student Chapter

IETE Student Chapter

Bangalore Institute of Technology, Department of Electronics and Communication engineering IETE Students Forum (ISF) conducted technical talk on Artificial Intelligence on 10th August 2019.
Ashika Nadiu gave the keynote speech on August 10 from the Defence Research and Development organization (DRDO) in Bangalore for Artificial Intelligence.
Ashika explained that in theory, AI is defined as machines doing what humans do. In Practice, AI refers to narrower tasks- such as pattern speech or image recognition – that were once thought to require human intelligence. Recent progress in computer science shows that machines can complete these narrower task as well as – or may be better than – humans.
Practical AI shines in those kinds of black-and-white situations, but programming AI and machine learning is still 99 percent human work. “The equation for AI success is taking a set of categories and an enormous amount of data and then feed those two inputs through an algorithm. That produces the models that do the work for us.

Technical Talk on Artificial Intelligence held on 10th August 2019

Activities Conducted under Professional Bodies Forum (PBF)

• The Professional Bodies Forum (PBF) , BIT, Organized one day Free Workshop on 23rd February 2019.
• The Professional Bodies Forum (PBF) , BIT, Organized National Science day on 28th February 2019 in association with The Institution of Engineers (India).
• The Professional Bodies Forum, Bangalore Institute of Technology, Bangalore organized a faculty development program on “Linear algebra for Engineering applications & Startup to Entrepreneurship” on 1st April to 5th April 2019.

One day Latex workshop inaugurated in Dr. Rame Gowda Seminar Hall. There were 70 participants from various departments. The workshop hosted by Dr Aswath M.U, Principal BIT and Dr. Hariprasad S.A, Professor & Director. School of Engineering Technology, Jain University.

Latex Workshop 23rd February 2019

National science day inaugurated in Dr. Rame Gowda Seminar Hall. There were 200 participants from various departments. The National Science Day hosted by Er. Jasmail Singh, FIE, Chairman, IEI, Karnataka State Centre, Dr. S. P. Basavaraju, Former Professor and Head Department of Physics, BIT and Dr Aswath M.U, Principal BIT.

National Science Day on 28th February 2019

National Science Day Lecture Session by Dr. S. P. Basavaraju on “The illustrious life and achievements of Sir.C.V.Raman”

To celebrate National Science day, student science projects exhibition was arranged in BIT quadrangle. At the end, chief guest and principal sapling the rose plant on soil in BIT front gate garden.

National Science Day on 28th February 2019

FDP on “Linear algebra for Engineering applications & Startup to Entrepreneurship” inaugurated in Dr. Rame Gowda Seminar Hall. There were a total 144 participants from various departments. Dr. M U Aswath, Principal, BIT and Dr. R Vittal Rao Department of Electronic Systems Engineering (DESE) Indian Institute of Science (IISC), Bangalore, hosted the FDP. The purpose of this FDP was to expose the faculty members/ research scholars/ Students to aware about various common aspects of all engineering branches, which forms the need of the day.

5-Days Faculty Development Program on 1st April to 5th April 2019

Workshop Organized

On April 3rd 2017, Department of ECE hosted a three days Faculty Development Program entitled “Advances in VLSI Design”. The department of ECE in association with M/S Entuple Technology, Bangalore, conducted the FDP. The purpose of FDP was to bring together a Faculty and Researchers to learn about characterization for analog domain of VLSI.

During 10 and 11 April 2017, Department of ECE conducted IoT BOOT Camp 2017, in partnership with M/s Preva Systems for benefits of the student began with an introduction to the concept and briefing the students with the various aspects of IoT. The second day of the workshop on complete hands on session, where various sensors like DHT-11-Temperature and humidity sensor, soil-moisture sensors, TSOP sensor etc were interfaced with the microcontroller unit NOOEMCU ESP8266. The students were familiarized with the integrated development environment of Arduino. The outcome of the workshop is architecturing Tomorrows reality using internet of Thing.

During the period 1 to 5 Jan 2018, Department of ECE conducted ARM Cortex and Embedded controller faculty development program. During 26 and 27 Feb 2018 department of ECE also conducted on the workshop on Computer networks using NS2, for the benefit of the smooth CCN lab.

ECSA Activities

ECSA conducted action packed event during Manthan 2015. With a total of 11 teams participating, this event was a huge success. Participants carried home huge cash prizes, worth Rs. 7000 and Rs. 4000 for runners respectively.

The 1st Round required the participants to build an autonomous line follower robot. In the round 2nd the robot of 1st round had to be modified to an obstacle avoiding line follower robot.

The final round, needs the robot had to be modified into a remote controlled robot which need to navigate through an arena.

PRISM (29th August 2015)

As the title suggests, PRISM brought together a mélange of events. The platform of ECSA was extended to its new members, well intended, cheerful atmosphere was forged and the carefully organized events were met with sheer enthusiasm. Prism saw vivacious participation and succeeded in capturing the attention of the audience.

Line Follower workshop using ARDUINO (12th -13th September 2015)

Technology brings with it the potential to unarm new possibilities and realize new ideas. As a first step to tap this potential ECSA organized a workshop to build and code for a line follower robot using Arduino. The workshop enhanced the technical knowledge and skills of the ardent students. Starting from the fundamentals, the software and hardware aspects of the bot were dealt with tactfully.

Smart Obstacle avoiding Robot -2017

A robotics workshop mainly focused on giving a hands-on experience with Android-app development, Adriano Uno and interfacing various sensors with Adriano development board.

Sincrona -2016

ECSA conducted a project exhibition for the 1st, 2nd and 3rd year students of all branches of BIT. This event witnessed an active participation of about 32 teams consist of young enthusiasts in the field of technology.

Enigma -2017

On September 18th 2017 ECSA conducted its Mega Cultural Event Enigma consisting of 4 rounds. The first round involved a general quiz, the second round was a vocal trivia based round. The third round involved a minute to win it and finally the fourth round consisted of puzzle solving including dumb charades and a tangram. Around 37 teams participated in the event and cash prizes were given to the first, second and third place winners.

Research Detaiils

i. About R & D

The Department of Electronics and Communication Engineering has been a recognized Research centre under VTU since the year 2012. The researchers can register for Ph.D. programs in the domains of

• Wireless Communication
• Wireless Communication Networks
• Antennas
• Mobile Communication
• VLSI
• Signal Processing etc, with the faculty well vased within there domains.

Currently there are about 28 students have registered for Ph.D program and 4 research Scholar are awarded from Electronics & Communication Engineering Research Center, BIT, Bangalore.

Research coordinator
Dr. Hemanth Kumar A.R, Professor

ii. Major Research Labs

Research & Development Lab (Room No. 207)

iii. Research Centre Information (Hardware & Software Equipment’s)

• Cadence Tool (Both Digital and analog Tools)
• FPGA and Vertex Boards
• MATLAB Tool
• Microwave Bench (Hardware Equipment) (BPSK&QPSK Kits)
• DSP Kits

iv. Guest lectures/Invited talks for Research scholars and Faculties

List of Ph.D. Awarded

Department Faculty Research Details

Research Scholars

ECE BIT Faculty list of Publications from last 5 years.

Year: 2019-2020 (Aug 2019 to July 2020)
Total Publications: 32
Total Journals: 26
Total Conference: 06
International Journals:

1. Dr.K.V Prasad, et al, “Performance realization of CORDIC based GMSK system with FPGA prototyping ”. IJASCA,2020.
2. Dr.K.V Prasad, et al, “Design and analysis of optimized CORDIC based GMSK system on FPGA platform". IJECE, 2020.
3. Dr.K.V Prasad, et al, “GMSK Modulator and Demodulator techniques on hardware and software platform with research Gaps and trends”. IJITEE, 2019.
4. Dr.K.V Prasad, et al, “Design of DM with Interpolated FIR Filter Channel estimation based fixed WiMax system for data and image transmission”. IJRTE, 2019.
5. Dr. M.N Sreerangaraju, et al. “Optomechnical Behavior of coated FBG Sensor with Side Hole Package Technology for underwater Acoustic Applications”, Test engineering and management (Scopus Indexed), 2020.
6. Dr. M.N Sreerangaraju , et al. “A Comprehensive Study on Highly Sensitive”, EAI Endorsed Transaction on smart cities, 2020.
7. Srinivasa R.K, Hemanth Kumar.A.R, “ Delay Improvement using efficient HARQ-Scheduler in LTE”, International Journal of Electrical Engineering and Technology, 2020.
8. Sailendra S, Vijaya Praksh.A.M, Nishanth Ravindranth, et.al, “ Automation of Tester Diagnostics”, International Journal of Engineering and Advanced Technology (IJEAT), 2020.
9. Vegha.B.N, Dr. Vijaya Praksh.A.M, et.al, “ Design and Implementation of 4-bit ALU for Low-power using Adiabatic Logic Based on FinFet”, International Journal of creative research Thoughts (IJCRT), 2020.
10. Poornima S Magadum, Dr C.R.Byra Reddy, et.al, “5G Communication System Based on PLC-VLC Design”, International Research Jouranl of Engineering and Technology (IRJET), 2020.
11. Dr C.R.Byra Reddy, et.al, “Synthesis of ZnO Ultra thin film based bottom gate phototransistors for UV detection”, Jouranl of Electronic materials by Springer, 2020.
12. K. Nirmala Kumari, et.al, “CAN Configuration management for the Electric vehicles using AUTOSAR and OEM architectures”, International Journal of creative research Thoughts (IJCRT), 2020.
13. Veena H S, et.al, “Intelligent Transporation system, Node MCU-MQTT implementation”, International Journal of creative research Thoughts (IJCRT), 2020.
14. H Sudha, ,,et.al, “Optimised mix column architecture design and fault detection scheme for the Advanced encryption Standard”, International Journal of creative research Thoughts (IJCRT), 2020.
15. Anisha.K, Dr.A B Kalpana, et al. “A High performance and low power Adaptive FIR Filter using Approximate arithmetic circuits”, International Journal of creative research Thoughts (IJCRT), 2020.
16. Deepti Raj, A.B Kalpana & Manoj Kumar Singh, et.al, “State encoding for low power in FSM using non-oscillating self-adaptive particle swarm optimization (NOS-SAPSO), 2020.
17. Dr.A B Kalpana, et al. “Design of High Gain Low Noise Amplifier for RF Systems”, IJITEE, 2020.
18. Dr.Narendra.C.P, et.al, “ Low Power Datapath architecture for multiply-accumulate (MAC) unit”, 2019 4th International conference on Recent Trends on Electronics, Information, Communication & Technology, (RTEICT -2019).
19. J Pushpanjali, et.al, “Long rag Wireless Tethering selfie Camera system using wirelee sensor Network”, International Research Jouranl of Engineering and Technology (IRJET), 2020.
20. Mukthi.S.L,et.al,”A Novel Power efficient Division Architecture using Reversible Computing”, International Journal of creative research Thoughts (IJCRT), 2020.
21. Shylaja V, et al. “A high throughput Double MAC for hardware acceleration in Deep Learning” IJCRT, 2020.
22. Vijaya Lakshmi D, et al, “A Competitve analysis of digital filters in image processing application”, International Journal of creative research Thoughts (IJCRT), 2020.
23. Jalaja.S, et.al, “Unary Processing based Odd-Even Merge Sorting Network”, International Journal of creative research Thoughts (IJCRT), 2020.
24. Niranjan E, et.al, “Efficient Classification of images in wireless endoscopy”, International Journal of Advanced research in Dynamical and Control systems, 2020.
25. Niranjan E, et.al, “Optimized VLSI architecture for adaptive Haze Removal”, International Journal of creative research Thoughts (IJCRT), 2020.
26. Vidya.H.N, et.al, “Brain MR image Enhancement using Average intensity Replacement based on GWOHE Algorithm”, International Journal of Engineering and Advanced Technology (IJEAT), 2020.

International Conference:

1. Santhosh Babu.K.C, Dr. Vijaya Praksh.A,M, et.al, “Relative Analysis of carry Skip Adder using 28T, 10T& 8T Full Adders”, International Conference on Recent Trends in Electrical, Electronics and Computer Science Engineering, 2020.
2. Karunavathi R K, et.al, “Design of a reconfigurable digital modulator for high bit rate data transmission”, 6th International conference on Electronics, Computing and Communication Technologies, IEEE, Connect 2020.
3. R.Krishna, et.al, “A Technique of designing Low Leakage SRAM in Deep Sub-Micron Technology”, 6th International conference on Electronics, Computing and Communication Technologies, IEEE, Connect 2020.
4. Manasa P, et al. “Maxizing the Network Lifetime using supervisor node in wireless sensor Networks”, 2019, IEEE 16th India Council International Conference (INDICON), 2020.
5. Manasa P, et al. “DMHCET: Detection of Malicious Node for Hierarchical Clustering based on Energy Trust in wireless sensor Network”, IEEE World S-4-2020, UK.

National Conference:

1. Dr.Narendra.C.P, et.al, “Design of sorting Networks using Unary Processing and Implemetation of Adaptive Median Filter”, National Conference on Communication Standards and Systems”, 2020.

Year: 2018-2019 (Aug 2018 to July 2019)
Total Publications: 20
Total Journals: 12
Total Conference: 08

International Journals:

1. Dr K V Prasad, et al. “Lung Cancer Nodules classification and detection using SVM and CNN clasiifiers” International Research Journal of Engineering and Technology (IRJET), 2019.
2. Dr K V Prasad, et al. “Data Nulling superimposed pilot based channel estimator for MIMO –OFDM systems”, International Journal of Innovative Research in science Engineering and Technology, 2019.
3. Dr K V Prasad, et al. “Front view Identification of Vehicles by using Machine Learning Technique”, International Research Journal of Engineering and Technology (IRJET).
4. Dr. M.N Sreerangaraju , et al. “Cloud Data Authentication for Health Monitoring System Using IoT Technology”, International Research Journal of Engineering and Technology (IRJET), 2019.
5. A B Kalpana, et al. “High gain and low power up conversion Mixer for Wireless LAN Applications”, IJSRST-2019.
6. A B Kalpana, et al. “Assertion based verification of AHB-LITE protocol for maximum coverage”, Journal of Applied Science and Computation, 2019.
7. A B Kalpana, et al. “PRE Dynamic SENT Encryptions with Dynamic S-Box using Karnaugh Mapping”, International Journal of Modern electronics and communication engineering (IJMECE), 2019.
8. Mukthi S L, et al. “An IOT based fire Alerming and authentication system for workshouse using raspberry PI3”, JETIR 2019.
9. Vijaya Lakshmi D, et al. “Implementation of a secure Encrypted data layer for IOT applications on a reconfigurable hardware”, International Jouranl of Engineering Science Invention (IJESI), 2019.
10. Shylaja V, et al. “FPGA Implementation of Priority arbiter based router design for NOC systems”, International Journal of Advanced Research in Engineering and Technology, 2019.
11. Jalaja S, et al. “Low Power Analog circuit design using Memristors”, International journal of Modern Electronics and Communication Engineering (IJMECE), 2019.
12. Manasa P, et al. “WDMRR: watch Dog monitored Ring Routing Protocol to improve QoS in wireless sensor Networks”, IJSDR 2019.

International Conference:

1. Dr Hemanth Kumar A R, et.al, “A Method of Throughput enhancement in next Generation wireless Network by using Machine Learning Framework through Predictive Signaling”, IEEE ICECEIC conference, held on 30th and 31st of January 2019.
2. Dr Hemanth Kumar A R, et.al, “Minimizing Latency for 5G Multimedia and V2X applications using Mobile Edge Computing”, IEEE conference, held in WInLA/b, Rutgers University, NJ, USA. June 2019.
3. Dr Hemanth Kumar A R, et.al, “Minimizing Latency for 5G Multimedia and V2X Applications using Mobile Edge Computing”. ICCT’19: 2nd International Conference on Intelligent Communication and Computational techniques. 2019.
4. Dr Hemanth Kumar A R, et.al, “A Method of Throughput Enhancement in Next Generation wireless Network by using Machine Learning Framework Through Predictive Signaling”. International Conference on Electrical, Communication, Electronics, Instrumentation and Computing (ICECEIC-2019).
5. Dr Hemanth Kumar A R, et.al, “Network usage optimization for collaboration on an Infinite Canvas with a viewport based novel Technique”. IEEE Asia Pacific Conference on wireless and Mobile, 2019.
6. Nirmala Kumari K, et.al, “Device to capture both Environmental and Physiological Parameter for Respiratory Problems”, National Conference on Communication Standards , ICT-NRV19.
7. Nirmala Kumari K, et.al, “Intelligent embedded System for Water Monitoring in Aquaculture National Conference on Communication Standards ICT-NRV19
8. Karunavathi R K, et.al, “Localization of Nodes in underwater wireless sensor Networks”, International Conference on Recent Trends on Electronics, Information, Communication & Tecnology 978-7281-0630-4/19/IEEE.

Year: 2017-2018 (Aug 2017 to July 2018)
Total Publications: 35
Total Journals: 25
Total Conference: 10

International Journals:

1. Dr. K.V Prasad, et. al, “FPGA Implementation of AES Algorithm for Image, Audio, and Video signal”, Springer Nature Singapore, 2018.
2. Dr. K.V Prasad, et. al, “Analysis of power reduction and implementation on FPGA for AES-128 bits using BEDT schemes", International journal of Engineering & Technology, 2018.
3. Dr. K.V Prasad, et. al, “FPGA Implementation of Stellar matrix based on Mix column in Advanced Encryption standards”, Journal of Advanced Research in Dynamical and Control Systems, 2018.
4. Dr. K.V Prasad, et. al, “Performance of LTE vehicle-to-vehicle”, International Journal of Advance Research, Ideas and Innovations in Technology, 2018.
5. Dr. K.V Prasad, et. al, “Efficient Hardware Design of Single Carrier GSMK Modulator and Demodulator for Next Generation Communication using Flexible and Optimal Sub-Modules”, International Journal of New Innovations in Engineering and Technology, 2018.
6. Dr. M.N Sreerangaraju, et. al, ““Performance Evaluation of Adaptive Telemetry Acoustic Modem for Underwater Wireless Sensor Networks”, Springer CCIS, 2018.
7. Dr Hemanth Kumar A R, et. al, “Investigation for LTE and WLAN conjunction in NS3”, International Journal of Innovative Research in Computer and Communication Engineering, 2018.
8. Dr.A.M.VijayaPrakash, et. al, “Different retiming transformation technique to design optimized low power VLSI architecture”, AIMS Electronics and Electrical Engineering, 2018.
9. Dr.A.M.VijayaPrakash, et. al, “Circular Retiming technique to design Optimized Least Mean square architecture for adaptive filter”, Journal of VLSI Design Tools and Technology (JoVDTT), 2018.
10. Dr.CRByraReddy, et. al, “A Modified Rectangular L Shaped Slot with DGS Microstrip Patch Antenna for MIMO Application”, International Journal of Engineering Research and Application, 2018.
11. Dr.CRByraReddy, et. al, “A Design and Analysis of Spanner Shaped Ultra-Wideband Antenna for MIMO Application”, International Journal of Engineering & Technology, Science Publishing Corporation, Dubai, UAE, 2018.
12. K Nirmala Kumari, et. al, “Monitor of Respiratory Movement and Caretaking System in Baby Cradle”, International Journal of Advance Research, Ideas and Innovations in Technology (IJARIIT), 2018.
13. S.Sujatha, et. al, “Design of efficient compression & cryptographic model for an image transmission using WBCT & ECC”, IJARIIT journal, 2018.
14. Karunavathi.R.K, et. al, “ESTOI for predicting the intelligibility of speech”, International Journal of advance research, Ideas and innovations in technology, 2018.
15. Veena H S, et.al, “Internet of Things Network Durability Enhancement for OLSR protocol using advanced energy efficient techniques”, International Jouranl of Innovative Research in computer and communication engineering, 2018.
16. Dr.A B Kalpana,et.al, “Radix-4 DIT FFT implementation using Fused Floating-Point Arithmetic Unit”, International Journal of Advance Research, Ideas and Innovations in Technology, 2018.
17. Dr.Narendra.C.P, et.al, “Power efficient Architecture for long Scaling Applications", International Journal of Applied Engineering Research, 2018.
18. J.C Narayana Swamy, et.al, “Wireless Active Vibration control for structural vibrations using Embedded Controller”, International Research Journal of Engineering and Technology (IRJET), 2018.
19. Bhagirathi N M, et.al, “Design and Implementation of ATM Security by using fingerprint recognition.”, International Journal of Emerging Research and Development, 2018.
20. R.Krishna, et.al, “A Smart farming system using Arduino based technology”, International Journal of Advance Research, Ideas and Innovations in Technology, 2018.
21. L.Dhanalakshmi, et. al, ““Development of Novel Embedded Controller for safe landing of UAV”, IJAREEIE, 2018.
22. SharmishtaPN, ShylajaV, et.al, "System Validation of Proximity Integrated Circuit Card using FPGA", 2018.
23. Jalaja S, et.al, “Retime Low Power Approximate Multiplier for Image Sharpening and Smoothing”, IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), 2018.
24. Jalaja S, et.al, “Different retiming transformation technique to design optimized low power VLSI architecture”, AIMS Electronics and Electrical Engineering, 2018.
25. Jalaja S, et.al, “Circular Retiming technique to design Optimized Least Mean square architecture for adaptive filter”, Journal of VLSI Design Tools and Technology (JoVDTT), 2018.

International Conference:

1. Dr. K.V Prasad, et.al, “FPGA Implementation of AES Algorithm for Image, Audio and Video signal”. International Conference on Intelligent Computing and Applications, Springer Nature Singapore Pvt Ltd, 2018.
2. Dr. M.N Sreerangaraju, et.al, “Performance Evaluation of Adaptive Telemetry Acoustic Modem for Underwater Wireless Sensor Networks”. Springer CCIS, 2018.
3. Dr Hemanth Kumar A R, et.al, “ Scaling Effectiveness in Existing Research-based Scheduling Practices in LTE-based Network Communications on Applied Electronics (CAE)”,. 2018, ISSN : 2394-4714 Foundation of Computer Science FCS, New York, USA Volume 7 – No. 16
4. Dr A M Vijaya Prakash, , et.al, “Design of Low Power SAR ADC using Clock Retiming”. 2018, IEEE Computer Society Annual Symposium on VLSI.
5. Dr A M Vijaya Prakash, , et.al, “Partition based Product term Retiming for Reliable Low Power Logic Structure”. Advances in Information and Communication Networks (FICC 2018), vol 886. Springer, Cham, Online ISBN978-3-030-03402-3, PP:178-189
6. Dr.C.R.ByraReddy, et.al, “IoT-Based Smart Food Storage Monitoring and Safety System”. International Conference on Computer Networks and Communication Technologies, Springer PP- 623-638, 2018.
7. Dr.CR ByraReddy, et.al , “4g shaped wide band patch antenna for wireless applications”. International conference on communication and electronics systems IEEE Xplore,ISBN: 978-1-5386-4765-3, 2018.
8. Dr. A B Kalpana, et.al, “Review on Synthesis Optimization of FSM for Area and Power Using Computational Intelligence”.International Conference on Innovative Research in Computation Applications (ICIRCA 2018)
9. Jalaja S, et.al, “Design of Low Power SAR ADC using Clock Retiming”. 2018 IEEE Computer Society Annual Symposium on VLSI.
10. Jalaja S, et.al, “Partition based Product term Retiming for Reliable Low Power Logic Structure”. Advances in Information and Communication Networks (FICC 2018) Volume: 886. Springer, Cham, Online ISBN978-3-030-03402-3, PP:178-189.

Year: 2016-2017 (Aug 2016 to July 2017)
Total Publications: 47
Total Journals: 39
Total Conference: 08

International Journals:

1. Dr. K.V Prasad, et. al, “High Speed Energy Efficient 16 Bit Carry Skip Adder”, International Journal of Advanced Research in Science, Engineering and Technology, 2017.
2. Dr. K.V Prasad, et. al, “Implementation of Modified JPEG-LS Algorithm”, International Journal of Engineering research in Electronics and Communication Engineering, 2017.
3. Dr. M.N Sreerangaraju, et.al, “Performance evaluation of transport layer protocols using NS-3”, International Journal of Engineering Research in Electronics and Communication Engineering, 2017.
4. Dr. M.N Sreerangaraju, et.al, “Energy Efficient Routing Protocol for Wireless Sensors Networks”, International Research Journal of Engineering and Technology (IRJET), 2017.
5. Dr Hemanth Kumar A R, et.al, “Point-n-Press: A Shrewdly widespread remote control framework to home appliances”, IJSDR Vol.2, Issue 6, 2017.
6. Dr Hemanth Kumar A R, et.al, “Automation for configuration of mobile networks using Robot Framework”, IJSDR, 2017.
7. Dr Hemanth Kumar A R, et.al, “Performance Comparison for Iterative Decoder using Max-Log-Map and Fully Parallel Turbo Decoding Algorithm”, International Journal of Latest Technology in Engineering Management & Applied Science (IJLTEMAS), 2017.
8. Dr.AMVijayaPrakash, et.al, “Application of Recurrently Decomposable Bi-dimensional Convlvers in digital video Processing”, International Journal of Computer Science & Communication Networks, 2017.
9. Dr.CRByraReddy, , et.al, “Effect of Baseline Separation Distance on GMT Velocity Estimation using Monopulse GMTI Technique in case of SAR”, 2017.
10. Dr.CRByraReddy, , et.al, “Ultra-Wideband Slotted Modified H-Shaped Microstrip Patch Antenna for Wireless Applications”, International Journal of Engineering Sciences & Research Technology, 2017.
11. Rajesh L, Dr.CRByraReddy,et.al, “Sleep Scheduling Mechanism in Inter-Cluster Communication for WSN”, ICTACT Journal on communication technology, 2017.
12. Nagabhushana HM, Dr. CRByrareddy, Thangadurai N, et.al, “Heptagonal Shaped Slotted Broad Band Patch Antenna for Wireless Applications”, 2017.
13. Nagabhushana HM, Dr. CR. Byrareddy, Thangadurai N., et.al, “A Novel S Shaped Wide Band Patch Antenna with Split Ground for Digital Multimedia Broadcasting and LTE”, International Journal of Engineering Development and Research, 2017.
14. Nagabhushana HM, Dr. CRByrareddy, Thangadurai N, Saleem Ulla Sharief, et.al, “Slotted and Miniaturized Patch Antenna for WLAN and WiMAX Applications”, International Journal of Advanced Information Science and Technology, 2017.
15. Madhushree G N, Dr. C R Byrareddy, HarishD , et.al, “SERDES Design Challenges and their Implications on PCB”, International Research Journal of Engineering and Technology (IRJET), 2017.
16. Dr.CRByraReddy,et.al, “Multi-Manet Gateway Routing System for Heterogenous system”, International Journal of Engineering Research in Electronics and Communication engineering, 2017.
17. AkshathaV, KNirmala Kumari, ,,et.al, “Automatic Accident Detection and Intelligent Navigation System”, International Journal of Engineering Trends and Technology (IJETT), 2017.
18. MallammaR Rudraswamimath, K Nirmala Kumari, ,,et.al, “Visualization of Disaster-Prone Area by a ROBOCAM for Rescue Operation”, International Engineering Research Journal (IERJ). 2017.
19. K.C Chandrashekarappa,,et.al, “Remaining Energy Cluster Head Selection and Leach Analysis of Smart wireless Sensor Network”, International Journal of Latest Technology in Engineering Management & applied Science (IJTEMAS), 2017.
20. SujathaS PramodDHuddar, ,,et.al, “Fruits & Leaf Disease Detection using Naïve Bayes Algorithm”, IJERECE , 2017.
21. R.K. Karunavathi AkshayaD, ,,et.al, “FBG Interrogator communication with embedded system”. International Research Journal of Engineering and Technology (IRJET) , 2017.
22. MS SwaroopaKabbal, RK Karunavathi, DBSingh, ,,et.al, “Study of Dielectric barrier discharge plasma on radar cross section reduction”. International Journal of Engineering Technology Science and Research (IJETSR), 2017.
23. Radha.B.L, Kishore kumar, ,,et.al, "Design and Implementation of 12-T SRAM cell in 32nm FinFET Technology", International Journal of Engineering research in Electronics and Communication Engineering, 2017.
24. H Sudha, ,,et.al, “Design and Implementation of Booth Multiplier using optical reversible carry select adder with AOI logic”, International Journal of Engineering Research in Electronics and Communication engineering, 2017.
25. H Sudha ,,et.al, “Implementation of High Speed Vedic Multiplier using Reversible Logic Gate”, International Journal of Advanced Research in Science Engineering and Technology, 2017.
26. Veena H S, et.al, “Application of Low Power Oscillator in Image Cryptosystem”, International Journal of Advanced Research in Science Engineering and Technology, 2017.
27. Veena H S, et.al, “Modeling Integration of CAN and Flexpay Communication controllers”, International Research Journal of Engineering and Technology (IRJET), 2017.
28. J.C Narayana Swamy, et.al, “Design and Implementation of a Low power ECG Based Processor”, International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE), 2017.
29. J.C Narayana Swamy, et.al, “Design of Automated Toll Gate System with UHF RFID”, International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE), 2017.
30. Bhagirathi N M, et.al, “Realization of IMS Network Elements by Virtualization” IJSDR, 2017.
31. J Pushpanjali, et.al, “Implementation of LAN Protocol in FPGA based C-Band Synthesizer in Radar”, IJSDR, 2017.
32. J Pushpanjali, et.al, “Health Monitoring of an power amplifier using an Ethernet controller”, IJSDR, 2017.
33. D Vijayalakshmi, et.al, “Security and Privacy for Digital Communication using Dual Steganography”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 2017.
34. Dr.A B Kalpana Ananda M, , et.al, “Design of an efficient Frequency Synthesizer used for Multi-Band OFDM”. International Journal of Latest Technology in Engineering, (IJLTEMAS), 2017.
35. Nivedita, Dr. A B Kalpana, , et.al, “Design and Implementation of Object Detection Technology Using ABPD Algorithm”. International journal of Electronics Engineering, 2017.
36. L.Dhanalakshmi Ambika, , et.al, "Frame work Enhancement for received signal strength monitoring in SBTS". International Journal of science & Engineering Development Research, 2017.
37. Mukthi.S.L, Sindhu.S.J, et.al, “Low-Voltage Radiation-Hardened SRAM”. World Journal of Engineering Research and Technology (WJERT) , 2017.
38. Mukthi.S.L,, Dr.A.r.Aswatha, , et.al, “Design and Implementation of an interfacing Protocol between I2C and APB for an AMBA based SOC”. International Journal of Scientific Engineering and science, 2017.
39. Jalaja S, Sunitha, , et.al, “Design and Implementation of Radix-4 FFT Using Retiming Approach”. International Journal of computer science & communication, 2017.

International Conference:

1. Dr. M.N Sreerangaraju, et. al, "Low power Viterbi Decoder Design based on Reversible logic Gates" International Conference on Electronics and Communication systems (ICECS) - 2017.
2. Dr. M.N Sreerangaraju, et. al, “Low power Architecture for 17X17 Parallel Multiplier using Reversible logic gates in 65nm Technology". International conference on computing for sustainable global development, 2017.
3. Dr Vijaya Prakash A M, et. al, “VLSI Architecture of Finite Impulse Response (FIR) Filter Implementation Using Retiming Technique”. World Academy of Science, Engineering and Technology International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering, 2017, Volume:11, No:2, PP:193-198
4. Dr.CRByraReddy , et.al, “A Spanner Shaped Ultra-Wideband Antenna for MIMO Application” IEEE Xplore Digital Library -2017.
5. Dr.CRByraReddy, et.al, “A Novel S Shaped Wide Band Patch Antenna with Split Ground for Digital Multimedia Broadcasting and LTE”. Proc. of 3rd Regional Conference on Radio Science, (URSI-RCRS 2017).
6. Dr.A B Kalpana Ananda M, Dr.A B Kalpana,“Design of High gain Low power down conversion Mixer used for Wireless LAN applications”. International Conference on Innovative Mechanisms for Industry Applications (ICIMIA 2017)
7. MAnanda, Dr. A B Kalpana, "Design of high gain low power down conversion mixer used for wireless LAN applications," 2017 International Conference on Innovative Mechanisms for Industry Applications (ICIMIA).
8. Jalaja S “VLSI Architecture of Finite Impulse Response (FIR) Filter Implementation Using Retiming Technique”. World Academy of Science, Engineering and Technology International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering Volume:11, No:2, PP:193-198,2017.

Year: 2015-2016 (Aug 2015 to July 2016)
Total Publications: 51
Total Journals: 35
Total Conference: 16

International Journals:

1. Dr.K.V Prasad, et.al, “Implementation of Reconfigurable Architecture for Generic OFDM Modulator”, International Journal of Engineering Research and Applications, 2016.
2. Dr.K.V Prasad, et.al, “Implementation of Fragmentation of Long Controller Area Network (CAN) Messages utilizing CANTP”. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 2016.
3. Dr. M.N Sreerangaraju, et.al, "Performance evaluation of Cooperative MAC and ZRP in Cooperative Communication Networking Environment". International Research Journal of Engineering and Technology (IRJET) Volume:3, 2016.
4. Dr. M.N Sreerangaraju, et.al, "Optimized On-Demand Routing in Cooperative wireless Network". International Journal of Engineering Trends and Technology (IJETT), 2016.
5. Dr. M.N Sreerangaraju, et.al, "Low Power Digital ADC Architecture using Reversible Logic Gatesin 65nm Technology" International journal of Electrical, Electronics and Data Communication, 2016.
6. Dr. M.N Sreerangaraju, et.al, "Energy efficient Architecture for QPSK Modulation/Demodulation using reversible logic gates in 65nm technology" Submitted to Elsevier - 2016.
7. Dr. M.N Sreerangaraju, et.al, "Energy Efficient QAM Modulation/Demodulation Architecture using Reversible Logic gates" International Journal of Scientific & Engineering Research, 2016.
8. Dr. M.N Sreerangaraju, et.al, "Energy Efficient Architecture for 4-TAP FIR filter using Reversible Logic gates", International Journal of Scientific & Engineering Research, 2016.
9. Dr. M.N Sreerangaraju, et.al, "Optimal Design of R2R DAC using Reversible Logic, International Journal of advanced research in computer science and software engineering volume:7, Issue:5, ISSN:2277 128X, 2016.
10. Dr Hemanth Kumar A R, et,al, “Performance study of LTE scheduling algorithms in vehicular & pedestrain mobility”, IJAREETE, 2016.
11. Dr Hemanth Kumar A R, et,al, “Analysis of energy efficient network beam design using forming design using power normalized SNR”, IJIRSET 5, 2016.
12. Dr Vijaya Prakash A M, et,al, “Implementation of a 3-bit Flash ADC using TIQ modified comparator circuit and NOR-ROM based encoder”, IJAREEIE 2016.
13. Dr Vijaya Prakash A M, et,al, “Implementation of a 3-bit Flash ADC using T1Q Modified Comparator Circuit and NOR-ROM based Encoder”, International Journal Advanced Research in Electrical, Electronics and Instrumentation Engineering, 2016.
14. Dr. CRByrareddy, et.al, “BER Performance Simulation of OFDM system with Channel Estimation using M-PSK and M-QAM”. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 2016.
15. Dr. CRByrareddy, et.al, “An Implementation of a WiMAX based Digital Down Converter”. International Journal of Engineering Research & Technology, 2016.
16. Dr. CRByrareddy, et.al, “Detection of Hovering Helicopter Using Ground Based Radars”. Journal of Software Defined Radio, 2016.
17. Dr. CRByrareddy, et.al, “Mobility Prediction for Power Efficient Communication in Mobile Wireless Sensor Networks”. International Journal of control theory and applications. (IJCTA) 2016. (SCOPUS Indexed Journal)
18. Dr. CRByrareddy, et.al, “A Co-Operative Based Inter-Cluster Communication to Optimize Network Life Time in WSN”. Indian Journal of Science and Technology,2016. (SCOPUS Indexed Journal)
19. Dr. CRByrareddy, et.al, “A Multiband MIMO Microstrip Patch Antenna for Wireless Applications. Journal for Advanced Research in Applied Sciences, 2016.
20. K Nirmala Kumari, et.al, “Image Text to Speech conversion using OCR Technique in Raspberry PI”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE), 2016.
21. K Nirmala Kumari, et.al, “GestIC based Mouse Control and Home Automation”. International Journal of Electrical, Electronics and Computer Systems (IJAREEIE), 2016.
22. S Murali Narasimham, et.al, “Optimizing Chien search usage in the BCH Decoder, IJAREEIE 2016
23. S Murali Narasimham, et.al, “An efficient concurrent BIST for ROM module, IJSRD 2016
24. Sujatha S, et.al, “Enhancement of debased Images using guided Bilateral Filter, IJAREEIE 2016.
25. Radha.B.L, et.al, “VLSI Design and Implementation of Schmit Trigger based VCO for PLL Architecture”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineerin, 2016.
26. Dr. A B Kalpana, et.al, “Design, implementation and comparison of mix column architecture using different techniques”. International journal of innovative research in Electrical, Electronics, Instrumentation and Control Engineering, 2016.
27. Dr. A B Kalpana, et.al, “Do-254 Implementation of High-Speed Vedic Multiplier”. International Journal of Advanced Research in Electrical, Electronics, and Instrumentation Engineering, 2016.
28. L Dhanalakshmi, et.al, " Design and Implementation of LACP Protocol in L3 Switch". International Journal for Research & Development in Technology, 2016.
29. L Dhanalakshmi, et.al, " Image Processing using Modified Multiple Kernel Fuzzy C-Means Clustering (MMKFCM) Technique". International Conference on Applied and Theoretical Computing and Communication Technology, 2016.
30. Dr. Mukthi S L, et.al, “An efficient error correction Code for a Smart Reliable Network-on-Chip”, International Journal for scientific research & Development (IJSRD), 2016.
31. Dr. Mukthi S L, et.al, “Design and verification of Priority configurable interrupt controller”. World Journal of Engineering Research and Technology (WJERT), 2016.
32. Dr. Mukthi S L, et.al, “SPL Slave Controller for AMBA Based SOC”. European Journal of Advances in Engineering and Technology, 2016.
33. Dr. Mukthi S L, et.al, “Serial Peripheral Interface design for Advanced Microcontroller Bus Architecture based system-0n-chip”, IJMTST, 2016.
34. Jalaja S, et.al, “Efficient Adaptive LMS Filter with Reduced Power”. International Journal of Science Technology & Engineering (IJSTE) , 2016.
35. Bhagirathi N M, et.al, “Design and Implementation of Innovative schemes for allocating resources in cloud for media streaming applications. IJRSET 2016.

International Conference:

1. Dr.K.V Prasad, et.al, “MATLAB Implementation of Stereoscopic video generation for data encapsulation” National conference on Recent trends in Electronics & communication Engineering, 2016.
2. Dr. M.N Sreerangaraju, et.al, “Performance Evaluation of OFDM Coding System using Concatenated BCH and LDPC Codes”. International Conference on Wireless Communications, Networking, 2016.
3. Dr Vijaya Prakash A M, et.al, “Design of low power-based VLSI architecture for constant multiplier and high-speed implementation using retiming technique”. IEEE Conference, DOI 10.1109/MicroCom.2016.7522503.
4. Dr Vijaya Prakash A M, et.al, “An 8-bit Segmented current steering DAC for Low Power Communication Applications”, International Conference on Emerging Technology Trends, 2016.
5. Dr. CRByrareddy , et.al, “A Multiband MIMO Microstrip Patch antenna for wireless application” International conference on Advanced in Engineering Research (ICAER) ISBN: 978- 1537584836, 2016.
6. Dr. CRByrareddy , et.al, “A Signal Processing Method to Eliminate Grating Lobes”. Proc of IEEE International Conference on Electrical, Electronic Communication, Computer and Optimization Techniques (ICECCOT), ISBN: 978-1-5090-4697-3, 2016.
7. Dr. CRByrareddy , et.al, “A Packet Error Techniques to Optimize Overall Network Lifetime in WSN”. IEEE International Conference on Recent Trends in Electronics Information Communication Technology 2016 IEEE. (Indexed in IEEE explore Digital Library).
8. Dr. CRByrareddy , et.al, “Dual Band SIM Sized Microstrip Patch Antenna for Wireless Applications”. Proc. of IEEE International Conference on Electronics and Communication Systems, 2016.
9. Dr. CRByrareddy , et.al, “Efficient Wireless Sensor Network using Nodes Sleep/Active Strategy” IEEE International Conference on Inventive Computation Technologies. Coimbatore, India, 2016.
10. Karunavathi R.K , et.al, “Design & development of SPST MEMS switches”. National conference on Recent trends in Electronics & communication Engineering, RTEC, 2016.
11. Radha.B.L, et. al, "Design Modeling and Analysis of CNTFET Approach for Cervical Cancer Detection" International Conference of Nanotechnology - 2016.
12. Dr. A B Kalpana, et. al, “Design of an efficient Class-E Power amplifier: an application for Wireless LAN”. Emerging Trends and Advances in Electrical Engineering and Renewable Energy (ETAEERE-2016), First Springer International Conference Sikkim.
13. Dr. A B Kalpana, et. al, “Implementation of FIR filter as Do-254 compliance”. 2016 International Conference on Emerging Technological Trends (ICETT), 2016.
14. L Dhanalakshmi, et. al, " Image Processing using Modified Multiple Kernel Fuzzy C-Means Clustering (MMKFCM) Technique". International Conference on Applied and Theoretical Computing and Communication Technology, 2016.
15. L Dhanalakshmi, et. al, "A Novel method for image processing using PSO technique". International conference on Electrical,Electronics, and optimization Techniques (ICEEOT) -
16. Jalaja S, et. al, “Design of low power-based VLSI architecture for constant multiplier and high-speed implementation using retiming technique”. IEEE Conference, NIT Durgapur, DOI 10.1109/MicroCom.2016.7522503.

Year: 2015-2016 (Aug 2015 to July 2016)
Total Publications: 35
Total Journals: 28
Total Conference: 07

International Journals:

1. Dr. M.N. SreeRanga Raju, et. al, “Design of 2X2 DFT spread STBC coherent optical OFDM for PDM optical communications”, IJVDCS 2015.
2. Dr. M.N. SreeRanga Raju, et. al, “Optimal design of R-2R DAC using Reversible logic”, IJARCS Vol-05,Issue-05,PP:835-841, May 2015.
3. Dr. M.N. SreeRanga Raju, et. al, “Design and Performance Evaluation of Error Detection and Correction using Concatenated BCH and LDPC coding Scheme for Data Streams in Satellite Communication IJERT August 2015.
4. Dr. A.M.Vijaya Prakash, et.al, “ASIC implementation of I2C master bus controller firm IP core” VLSICS 2015.
5. Dr. A.M.Vijaya Prakash, et.al, ASIC implementation of I2C master bus controller”, IJIRCCE, 2015.
6. S. Muralinarasimhan, et.al, “Design approach for fault recoverable ALU with improved fault Tolerance”, VLSICS 2015.
7. K. Nirmala Kumari, et. al, “Design and implementation of LDPC decoder using time domain AMS processing”, IJAR, ISSN:2394-7500,Vol-01,Issue-07,PP:271-276, June 2015.
8. K. Nirmala Kumari, et. al, “Design and implementation of IPV6 protocol on FPGA”, IJVDCS ISSN:2322-0929,Vol-03,Issue-03,PP:0299-0303, June 2015.
9. S. Sujatha, et.al, “Frequency reconfigurable µstrip patch ants for multi standard applications”, IJSR Vol-04, May 2015.
10. R.K. Karunavathi , et. al, “Link initialization and training in MAC layers of PCIe3.0” IJS & ER Vol-06 PP:2717-2719, June 2015.
11. R.K. Karunavathi , et. al, “Improved ALBA for path recovery around connectivity hoes in WSN's”, IJERT, Vol-03,Issue-14,Reg-NC ACCT14, May 2015
12. R.K. Karunavathi , et. al, “Low Power design and FPGA implementation of sequential digital FIR filter using micro-programmed controller”, IJTRE 2015.
13. J.C. Narayana Swamy , et. al, “Detecting embedded devices using Network”, IJISME 2015.
14. J.C. Narayana Swamy , et. al, “AUHF RFID tag antenna design with stub feed”, IJSRD Vol3 issue 7 2015.
15. J.C. Narayana Swamy , et. al, “A UHF RFID with double EBG structure”, International Journal of applied Electro magnetic, 2015.
16. R. Krishna, et. al, “FPGA digital beam forming for phase array radar”, IJERS, Oct 2015.
17. S.L. Mukthi, et.al, “Design of digital PID controller using fast adder”, IJVDCS, 2015
18. Jalaja S, et.al, “ASIC Architectures for Implementing ECC Arithmetic over Finite Fields”, IJSR, 2015.
19. Dr K.V Prasad, et.al, “Implemetation of DDFS using generalized Micro Rotation CORDIC algorithm, IJESC 2014.
20. Dr M N Sreerangaraju, et.al, “A 2.4 GHz reference –less receiver for QPSK Demodulation”, IJSR 2014.
21. Dr Vijaya Prakash A M, et.al, “VLSI Implementation of Intra Prediction algorithms in HEVC Decoder”, 2014.
22. S Muralinarasimham, et.al, “An efficient high speed convolution encoder and viterbi decoder”, IJSR 2014.
23. C Y Gopinath, et.al, “Verification of I2C Master core using system verilog – UVM”, IJSR 2014.
24. K Chandrashekarappa, , et.al, “ANN implementation for image compression and decompression using back propagation technique”, IJSR 2014.
25. B L Radha, et.al, “Implementation of Reliable shared Buffer Router for on chip Networks”, IJESC 2014
26. H S Veena, et.al, “An Efficient VLSI Implementation of lossless ECG encoder design”, IJSR 2014.
27. Dr C R Byrareddy, et.al, “ Implementation of Core-Lock mechanism as a Data synchronization method in embedded multi core systems”, IJSR 2014.
28. R Krishna, et.al, “Efficient implementation of high speed low power digital FIR Filter architecture design by Radix 4 multiplier”, IJSET 2014.

International conference

1. Dr M N Sreerangaraju, et.al, “FPGA Implementation of BASK-BFSK-BPSK digital modulator using reversible gate”, 2014.
2. Dr Hemanth Kumar A R, et.al, “Geo-Registration of Aerial images using RANSAC Algorithm”, 2014
3. Dr Hemanth Kumar A R, et.al, “Geo-Registration of Aerial images using NCC and RANSAC Algorithm”, 2014.
4. K Nirmala Kumari, et.al, “ Driver Drowsiness detection and alert system”, 2014.
5. K Nirmala Kumari, et.al, “Functional verification of USB 3.0 controller using UVM methodology”. 2014.
6. Jalaja S, et.al, “High Speed VLSI Architecture for Squaring Algorithm Using Retiming Approach”, Third International Conference on Advances in Computing and Communications organized by RSET, Cochin, Kerala, India during Aug 29-31 2013 and the paper is published in IEEE Computer Society's CPS.2013.
7. Jalaja S, et.al, “Fast and Power Efficient Constant Multiplier”, International conference on Computing communication and Advanced Network, organized in CIT, Chennai from 15th to 17th March 2013..

Staff awarded Ph.D. Degree

The department of Electronics and Communication offers two post graduate programs- M.Tech in VLSI and Embedded systems it was started during the academic year 2008-2009 with the intake of 18 and M.Tech in Digital Electronics and communication 2012-2103 with an intake of 24 respectively. The department has 38 staff members with 6 Ph.D Degree and an average experience of more than 10 years. The department is having research and development center to carry out research works to acquire Ph.D degree.

PG Coordinator
Dr. Vijya Prakash A.M, Professor

MTech. (VLSI Design and Embedded systems)

The semiconductor technology especially the VLSI Chip design has been developing at a very fast rate and today it has reached nanometer scale. The miniaturization and 3 D devices have enabled placing over one billion gates on a chip. This is drastically reduced the integrated circuit overall size and speed has tremendously increased. Advances in VLSI have resulted in a compact, highly reliable and fast electronics systems. The advances in VLSI have moved from integrated circuits to System on Chip. The designers have a very big challenge to design such a chip in highly competitive market. There is urgent need to produce quality engineers who will be able to create new chip ideas, design new VLSI chips and also embedded systems.

The program curriculum is aimed at VLSI and Embedded system design. The theoretical foundation is built through courses like Digital VLSI design, High speed VLSI design, Low power VLSI Design, Analog and mixed mode design, system on chip design. The practice includes the skill development in both front end & Back end designs, verification and testing. The course also offers strong knowledge and practical skills in developing embedded solutions on varied platforms such as FPGA, Advanced microcontrollers and processors. They learn to implement real time embedded systems. The designers gain practical knowledge through mini and major projects in both VLSI and Embedded system design domains.

Students also have access to advanced design suites such as Cadence, FPGA design suite, System Generator and several embedded design kits. The students are encouraged to participate in various sponsored projects in the College to carry out project work and to do the good publications.

Career Opportunities:

The students after completing this course have opportunity to work in companies working in the field of VLSI chip design such as Intel, Texas Instruments, , Infineon, TCS, AMD, Alliance semiconductors, Wipro, ARM and many more offer internship and placement opportunities. There are a host of embedded solutions companies offering excellent job opportunities, to name a few Tech Mahindra, Robert Bosch, I-micro, redpine signals etc.

Embedded systems are playing an ever-increasing role in our society. These systems can be found in numerous products, such as TV sets, copiers, washing machines, automobiles, aerospace, transportation systems, biomedical equipments etc., The combination of computer science (software) and electrical, electronics, and communications engineering (hardware) in these products makes an integrated approach to the development process necessary. This requires a new breed of engineers who can make use of knowledge of software and hardware.

MTech (Digital Electronics and Communication)

The M Tech in Digital Electronics and Communication covers study of design and analysis in the following subjects: Digital communications, Error control coding, RF circuits, Wireless standards, network on chips, MMC, Antenna Design , Advanced Signal Processing ,Sensor networks, Digital systems using CMOS, Satellite networks, etc.

Career Opportunities:

The potential career opportunities for candidates completing M Tech in Digital Electronics and Communication range from being an entrepreneur, researcher and design engineer in the core and IT industries and research institutes where product / service development is happening. The areas of work are in automotive communications, intelligent transport communication equipments, switches and router development, aerospace communication, wireless security, short range communications with medical instrumentation, wireless sensor communications design and development, mobile app development, etc.

VTU Rank holder of the year 2019.